In a microprogrammed data processor, microwords, or microinstructions, are read from an internal storage unit to provide internal processor control actions for executing the processor instructions obtained from a user's software program. The microwords are read from the storage unit and written to a control register one at a time. Each microword consists of multiple binary bits, some or all of which may be organized into pluralbit control groups or fields. The control register provides control point signals which, in turn, control the various data flow rate and data manipulation mechanisms within the data processor, with each microword controlling the internal operation of the data processor for one microword cycle. Several microwords are usually needed to execute each processor instruction. Some processor instructions require only a few microwords, while others require many.
The microwords may be located in a separate so called "control storage" unit, or they may be located in a portion of the processor's main memory set aside for the exclusive use of the microwords. Furthermore, microwords may also be stored in read only storage units (ROS).
Alternatively, the control storage unit and its associated addressing circuitry can be replaced by a programmable logic array (PLA), working in conjunction with a sequence counter. The PLA is driven by an operation code portion of the processor instruction and a particular sequence count from the sequence counter for producing a particular microword at its output. Such a PLA and sequence counter combination is able to provide significant savings in the size of the real estate (in terms of the area within the data processor) required--when the PLA is compared to the conventional storage unit. If a desired number of repetitions for a certain microcode is needed, a fixed capacity repeat counter for counting the number of microcode loops in order to terminate the looping action at a certain count is also required. For different types of processor instructions where the number of microcode loops are different, a different number of fixed capacity repeat counters may also be needed, thereby further burdening the data processor.
U.S. Pat. No. 4,556,938 (incorporated herein by reference to this application) discloses the use of a programmable repeat counter which can be loaded with different initial count values for different processor instructions, in order to provide different numbers of repeats for the different microcode loops needed for the different instructions. Although such an arrangement is able to reduce the amount of circuitry needed in those situations where microcode looping is provided for two or more different processor instructions, the fact remains that--when working in concert with the programmable repeat counter--the PLA can only generate one microword at a time. In other words, if an instruction requires the execution of a given action X number of times, the PLA needs to repeat all of the operations preceding (or following) this action the same X number of times in order to bring about this action, notwithstanding the fact that quite a few of these operations may not be necessary and in fact may actually take up valuable time. This necessarily leads to crude and inefficient processing of the computer microcode, thereby resulting in the unnecessary implementation of an excessive number of product terms (lines of microcode) to perform each job.